[PATCH] D91053: [PowerPC] Lump the constants to save one addis for each constant access

Qing Shan Zhang via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Dec 21 02:28:52 PST 2020


steven.zhang updated this revision to Diff 313051.
steven.zhang added a comment.

Rebase the patch.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D91053/new/

https://reviews.llvm.org/D91053

Files:
  llvm/lib/Target/PowerPC/CMakeLists.txt
  llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
  llvm/lib/Target/PowerPC/PPCConstantPoolValue.cpp
  llvm/lib/Target/PowerPC/PPCConstantPoolValue.h
  llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
  llvm/lib/Target/PowerPC/PPCISelLowering.cpp
  llvm/lib/Target/PowerPC/PPCISelLowering.h
  llvm/test/CodeGen/PowerPC/2012-09-16-TOC-entry-check.ll
  llvm/test/CodeGen/PowerPC/branch_coalesce.ll
  llvm/test/CodeGen/PowerPC/build-vector-allones.ll
  llvm/test/CodeGen/PowerPC/build-vector-tests.ll
  llvm/test/CodeGen/PowerPC/canonical-merge-shuffles.ll
  llvm/test/CodeGen/PowerPC/combine-fneg.ll
  llvm/test/CodeGen/PowerPC/constant-pool.ll
  llvm/test/CodeGen/PowerPC/extract-and-store.ll
  llvm/test/CodeGen/PowerPC/f128-aggregates.ll
  llvm/test/CodeGen/PowerPC/f128-passByValue.ll
  llvm/test/CodeGen/PowerPC/float-logic-ops.ll
  llvm/test/CodeGen/PowerPC/fma-combine.ll
  llvm/test/CodeGen/PowerPC/fma-mutate.ll
  llvm/test/CodeGen/PowerPC/fmf-propagation.ll
  llvm/test/CodeGen/PowerPC/fp-strict-conv-f128.ll
  llvm/test/CodeGen/PowerPC/fp-to-int-to-fp.ll
  llvm/test/CodeGen/PowerPC/handle-f16-storage-type.ll
  llvm/test/CodeGen/PowerPC/load-shuffle-and-shuffle-store.ll
  llvm/test/CodeGen/PowerPC/mcm-12.ll
  llvm/test/CodeGen/PowerPC/mcm-4.ll
  llvm/test/CodeGen/PowerPC/mcm-obj-2.ll
  llvm/test/CodeGen/PowerPC/mcm-obj.ll
  llvm/test/CodeGen/PowerPC/nofpexcept.ll
  llvm/test/CodeGen/PowerPC/p10-splatImm-CPload-pcrel.ll
  llvm/test/CodeGen/PowerPC/p10-vector-rotate.ll
  llvm/test/CodeGen/PowerPC/p9-vinsert-vextract.ll
  llvm/test/CodeGen/PowerPC/ppcf128-constrained-fp-intrinsics.ll
  llvm/test/CodeGen/PowerPC/ppcf128-endian.ll
  llvm/test/CodeGen/PowerPC/pr25080.ll
  llvm/test/CodeGen/PowerPC/pr43976.ll
  llvm/test/CodeGen/PowerPC/pr45628.ll
  llvm/test/CodeGen/PowerPC/pr45709.ll
  llvm/test/CodeGen/PowerPC/pr47660.ll
  llvm/test/CodeGen/PowerPC/pr47891.ll
  llvm/test/CodeGen/PowerPC/pre-inc-disable.ll
  llvm/test/CodeGen/PowerPC/recipest.ll
  llvm/test/CodeGen/PowerPC/repeated-fp-divisors.ll
  llvm/test/CodeGen/PowerPC/sat-add.ll
  llvm/test/CodeGen/PowerPC/scalar_cmp.ll
  llvm/test/CodeGen/PowerPC/scalar_vector_test_4.ll
  llvm/test/CodeGen/PowerPC/select_const.ll
  llvm/test/CodeGen/PowerPC/signbit-shift.ll
  llvm/test/CodeGen/PowerPC/toc-float.ll
  llvm/test/CodeGen/PowerPC/vavg.ll
  llvm/test/CodeGen/PowerPC/vec-itofp.ll
  llvm/test/CodeGen/PowerPC/vec-trunc.ll
  llvm/test/CodeGen/PowerPC/vec-trunc2.ll
  llvm/test/CodeGen/PowerPC/vec_add_sub_doubleword.ll
  llvm/test/CodeGen/PowerPC/vec_add_sub_quadword.ll
  llvm/test/CodeGen/PowerPC/vec_conv_i16_to_fp32_elts.ll
  llvm/test/CodeGen/PowerPC/vec_conv_i16_to_fp64_elts.ll
  llvm/test/CodeGen/PowerPC/vec_conv_i8_to_fp32_elts.ll
  llvm/test/CodeGen/PowerPC/vec_conv_i8_to_fp64_elts.ll
  llvm/test/CodeGen/PowerPC/vector-constrained-fp-intrinsics.ll
  llvm/test/CodeGen/PowerPC/vector-extend-sign.ll
  llvm/test/CodeGen/PowerPC/vector-popcnt-128-ult-ugt.ll
  llvm/test/CodeGen/PowerPC/vector-rotates.ll
  llvm/test/CodeGen/PowerPC/vperm-lowering.ll
  llvm/test/CodeGen/PowerPC/vselect-constants.ll
  llvm/test/CodeGen/PowerPC/vsx.ll



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