[PATCH] D93622: [ARM] Extend lowering for i64 reductions

Dave Green via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Dec 21 02:17:53 PST 2020


dmgreen created this revision.
dmgreen added reviewers: SjoerdMeijer, samtebbs, simon_tatham, efriedma.
Herald added subscribers: danielkiss, hiraditya, kristof.beyls.
dmgreen requested review of this revision.
Herald added a project: LLVM.

The lowering of a <4 x i16> or <4 x i8> vecreduce.add into an i64 would previously be expanded, due to the i64 not being legal. This patch adjusts our reduction matchers, making it produce a VADDLV(sext A to v4i32) instead.


https://reviews.llvm.org/D93622

Files:
  llvm/lib/Target/ARM/ARMISelLowering.cpp
  llvm/test/CodeGen/Thumb2/mve-vecreduce-add.ll
  llvm/test/CodeGen/Thumb2/mve-vecreduce-addpred.ll
  llvm/test/CodeGen/Thumb2/mve-vecreduce-mla.ll
  llvm/test/CodeGen/Thumb2/mve-vecreduce-mlapred.ll

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