[PATCH] D93608: [RISCV] Add intrinsics for vslide1up/down, vfslide1up/down instruction

[ShihPo Hung via Phabricator via llvm-commits]

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Define vslide1up, vslide1down, vfslide1up, and vfslide1down intrinsics and lower to V instructions.

We work with @rogfer01 from BSC to come out this patch.

Authored-by: Roger Ferrer Ibanez <rofirrim at gmail.com>
Co-Authored-by: ShihPo Hung <shihpo.hung at sifive.com>


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D93608

Files:
  llvm/include/llvm/IR/IntrinsicsRISCV.td
  llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
  llvm/test/CodeGen/RISCV/rvv/vfslide1down-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfslide1down-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vfslide1up-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfslide1up-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vslide1down-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vslide1down-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vslide1up-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vslide1up-rv64.ll

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