[PATCH] D92973: [RISCV] Add intrinsics for vsetvli instruction

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Dec 18 12:57:21 PST 2020


This revision was automatically updated to reflect the committed changes.
Closed by commit rG69c8d121f7f2: [RISCV] Add intrinsics for vsetvli instruction (authored by craig.topper).
Herald added a subscriber: jrtc27.

Changed prior to commit:
  https://reviews.llvm.org/D92973?vs=312253&id=312876#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D92973/new/

https://reviews.llvm.org/D92973

Files:
  llvm/include/llvm/IR/IntrinsicsRISCV.td
  llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
  llvm/lib/Target/RISCV/Utils/RISCVBaseInfo.cpp
  llvm/lib/Target/RISCV/Utils/RISCVBaseInfo.h
  llvm/test/CodeGen/RISCV/rvv/rv32-vsetvli-intrinsics.ll
  llvm/test/CodeGen/RISCV/rvv/rv64-vsetvli-intrinsics.ll

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