[PATCH] D93508: [RISCV] Define the remaining vector fixed-point arithmetic intrinsics

[Monk Chiang via Phabricator via llvm-commits]

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  This patch base on  [[ https://reviews.llvm.org/D93366 | D93366 ]] , 
  and define vector fixed-point intrinsics.
    1. vaaddu/vaadd/vasubu/vasub
    2. vsmul
    3. vssrl/vssra
    4. vnclipu/vnclip
  
  We work with @rogfer01 from BSC to come out this patch.
  
  Authored-by: Roger Ferrer Ibanez <rofirrim at gmail.com>
  Co-Authored-by: ShihPo Hung <shihpo.hung at sifive.com>


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D93508

Files:
  llvm/include/llvm/IR/IntrinsicsRISCV.td
  llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
  llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
  llvm/lib/Target/RISCV/RISCVRegisterInfo.td
  llvm/test/CodeGen/RISCV/rvv/vaadd-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vaadd-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vaaddu-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vaaddu-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vasub-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vasub-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vasubu-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vasubu-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vnclip-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vnclip-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vnclipu-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vnclipu-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vsmul-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vsmul-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vssra-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vssra-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vssrl-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vssrl-rv64.ll