[PATCH] D93353: [AMDGPU] Print SCRATCH_EN field after the kernel

[Stanislav Mekhanoshin via Phabricator via llvm-commits]

rampitec created this revision.
rampitec added reviewers: t-tye, kzhuravl.
Herald added subscribers: kerbowa, hiraditya, tpr, dstuttard, yaxunl, nhaehnle, jvesely, arsenm.
rampitec requested review of this revision.
Herald added a subscriber: wdng.
Herald added a project: LLVM.

https://reviews.llvm.org/D93353

Files:
  llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
  llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch-init.ll


Index: llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch-init.ll
===================================================================
--- llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch-init.ll
+++ llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch-init.ll
@@ -3,7 +3,14 @@
 ; Make sure flat_scratch_init is set
 
 ; GCN-LABEL: {{^}}stack_object_addrspacecast_in_kernel_no_calls:
-; GCN: .amdhsa_user_sgpr_flat_scratch_init 1
+; GCN:     s_add_u32 flat_scratch_lo, s4, s7
+; GCN:     s_addc_u32 flat_scratch_hi, s5, 0
+; GCN:     flat_store_dword
+; GCN:     .amdhsa_user_sgpr_flat_scratch_init 1
+; GCN:     .amdhsa_system_sgpr_private_segment_wavefront_offset
+; GCN-NOT: .amdhsa_reserve_flat_scratch
+; GCN:     COMPUTE_PGM_RSRC2:SCRATCH_EN: 1
+; GCN:     COMPUTE_PGM_RSRC2:USER_SGPR: 6
 define amdgpu_kernel void @stack_object_addrspacecast_in_kernel_no_calls() {
   %alloca = alloca i32, addrspace(5)
   %cast = addrspacecast i32 addrspace(5)* %alloca to i32*
@@ -13,7 +20,15 @@
 
 ; TODO: Could optimize out in this case
 ; GCN-LABEL: {{^}}stack_object_in_kernel_no_calls:
-; GCN: .amdhsa_user_sgpr_flat_scratch_init 1
+; GCN:     s_add_u32 flat_scratch_lo, s4, s7
+; GCN:     s_addc_u32 flat_scratch_hi, s5, 0
+; GCN:     buffer_store_dword
+; GCN:     .amdhsa_user_sgpr_private_segment_buffer 1
+; GCN:     .amdhsa_user_sgpr_flat_scratch_init 1
+; GCN:     .amdhsa_system_sgpr_private_segment_wavefront_offset 1
+; GCN-NOT: .amdhsa_reserve_flat_scratch
+; GCN:     COMPUTE_PGM_RSRC2:SCRATCH_EN: 1
+; GCN:     COMPUTE_PGM_RSRC2:USER_SGPR: 6
 define amdgpu_kernel void @stack_object_in_kernel_no_calls() {
   %alloca = alloca i32, addrspace(5)
   store volatile i32 0, i32 addrspace(5)* %alloca
@@ -21,7 +36,13 @@
 }
 
 ; GCN-LABEL: {{^}}kernel_no_calls_no_stack:
-; GCN: .amdhsa_user_sgpr_flat_scratch_init 0
+; GCN-NOT: flat_scratch
+; GCN:     .amdhsa_user_sgpr_private_segment_buffer 1
+; GCN:     .amdhsa_user_sgpr_flat_scratch_init 0
+; GCN:     .amdhsa_system_sgpr_private_segment_wavefront_offset 0
+; GCN:     .amdhsa_reserve_flat_scratch 0
+; GCN:     COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
+; GCN:     COMPUTE_PGM_RSRC2:USER_SGPR: 4
 define amdgpu_kernel void @kernel_no_calls_no_stack() {
   ret void
 }
Index: llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
===================================================================
--- llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
+++ llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
@@ -538,6 +538,9 @@
     OutStreamer->emitRawComment(
       " WaveLimiterHint : " + Twine(MFI->needsWaveLimiter()), false);
 
+    OutStreamer->emitRawComment(
+      " COMPUTE_PGM_RSRC2:SCRATCH_EN: " +
+      Twine(G_00B84C_SCRATCH_EN(CurrentProgramInfo.ComputePGMRSrc2)), false);
     OutStreamer->emitRawComment(
       " COMPUTE_PGM_RSRC2:USER_SGPR: " +
       Twine(G_00B84C_USER_SGPR(CurrentProgramInfo.ComputePGMRSrc2)), false);


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