[PATCH] D93298: [RISCV] add the MC layer support of Zfinx extension
luxufan via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Dec 17 07:22:00 PST 2020
StephenFan added inline comments.
================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoZfinx.td:102
+ : InstAlias<OpcodeStr#" $rd, $rs1, $rs2, $rs3",
+ (Inst GPR:$rd, GPR:$rs1, GPR:$rs2, GPR:$rs3, 0b111)>;
+
----------------
use GPR as instruction operand may cause the codegen part of zfinx report errors. Because the GPR has data type i32 or i64, However, the zfinx will deal with the data type f64 or f32.
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https://reviews.llvm.org/D93298/new/
https://reviews.llvm.org/D93298
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