[PATCH] D92228: [RISCV] Add MIR tests exposing missed InstAliases
Fraser Cormack via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Dec 17 06:51:39 PST 2020
frasercrmck added a comment.
@evandro I'm not sure what your comment was specifically referring to, but I've moved the test into the CodeGen/RISCV so I'll continue it here. If you were asking why the checks were in an odd place, it's because I can't use `update_mir_test_checks.py` because it requires MIR output, and `update_llc_test_checks.py` puts the CHECKs under the IR functions. So instead I just manually put the checks in the MIR bodies.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D92228/new/
https://reviews.llvm.org/D92228
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