[PATCH] D91771: [NFC][AArch64] Move AArch64 MSR/MRS into a new decoder namespace
Lucas Prates via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Dec 17 05:40:22 PST 2020
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rGb5bbb4b2b753: [NFC][AArch64] Move AArch64 MSR/MRS into a new decoder namespace (authored by pratlucas).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D91771/new/
https://reviews.llvm.org/D91771
Files:
llvm/lib/Target/AArch64/AArch64InstrFormats.td
llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
Index: llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
===================================================================
--- llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
+++ llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
@@ -267,8 +267,16 @@
uint32_t Insn =
(Bytes[3] << 24) | (Bytes[2] << 16) | (Bytes[1] << 8) | (Bytes[0] << 0);
- // Calling the auto-generated decoder function.
- return decodeInstruction(DecoderTable32, MI, Insn, Address, this, STI);
+ const uint8_t *Tables[] = {DecoderTable32, DecoderTableFallback32};
+
+ for (auto Table : Tables) {
+ DecodeStatus Result =
+ decodeInstruction(Table, MI, Insn, Address, this, STI);
+ if (Result != MCDisassembler::Fail)
+ return Result;
+ }
+
+ return MCDisassembler::Fail;
}
static MCSymbolizer *
Index: llvm/lib/Target/AArch64/AArch64InstrFormats.td
===================================================================
--- llvm/lib/Target/AArch64/AArch64InstrFormats.td
+++ llvm/lib/Target/AArch64/AArch64InstrFormats.td
@@ -1447,6 +1447,7 @@
"mrs", "\t$Rt, $systemreg"> {
bits<16> systemreg;
let Inst{20-5} = systemreg;
+ let DecoderNamespace = "Fallback";
}
// FIXME: Some of these def NZCV, others don't. Best way to model that?
@@ -1456,6 +1457,7 @@
"msr", "\t$systemreg, $Rt"> {
bits<16> systemreg;
let Inst{20-5} = systemreg;
+ let DecoderNamespace = "Fallback";
}
def SystemPStateFieldWithImm0_15Operand : AsmOperandClass {
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