[PATCH] D90614: [lld-macho] Handle paired relocs
Jez Ng via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Dec 16 18:46:15 PST 2020
int3 added inline comments.
================
Comment at: lld/MachO/InputFiles.cpp:227-236
+ // Note: X86 does not use *_RELOC_ADDEND because it can embed an
+ // addend into the instruction stream. On X86, a relocatable address
+ // field always occupies an entire contiguous sequence of byte(s),
+ // so there is no need to merge opcode bits with address
+ // bits. Therefore, it's easy and convenient to store addends in the
+ // instruction-stream bytes that would otherwise contain zeroes. By
+ // contrast, RISC ISAs such as ARM64 mix opcode bits with with
----------------
int3 wrote:
> love the explanation!
> inconvenient and more costly at runtime.
I might be misunderstanding, but do you mean link time instead of runtime?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D90614/new/
https://reviews.llvm.org/D90614
More information about the llvm-commits
mailing list