[PATCH] D93426: [RISCV] Add intrinsics for vfmv.f.s and vfmv.s.f

[Craig Topper via Phabricator via llvm-commits]

craig.topper created this revision.
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Similar to D93365 <https://reviews.llvm.org/D93365>, but for floating point. No need for special ISD opcodes though. We can directly isel these from intrinsics. I had to use anyfloat_ty instead of anyvector_ty in the intrinsics to make LLVMVectorElementType not crash when imported into the -gen-dag-isel tablegen backend.


https://reviews.llvm.org/D93426

Files:
  llvm/include/llvm/IR/IntrinsicsRISCV.td
  llvm/lib/Target/RISCV/RISCVInstrInfoV.td
  llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
  llvm/test/CodeGen/RISCV/rvv/vfmv.f.s.ll
  llvm/test/CodeGen/RISCV/rvv/vfmv.s.f-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfmv.s.f-rv64.ll

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