[PATCH] D93368: [RISCV] Define vector compare intrinsics.

Hsiangkai Wang via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Dec 15 21:34:53 PST 2020


HsiangKai created this revision.
HsiangKai added reviewers: craig.topper, evandro, rogfer01, frasercrmck, luismarques.
Herald added subscribers: NickHung, apazos, sameer.abuasal, pzheng, s.egerton, lenary, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, edward-jones, zzheng, jrtc27, shiva0217, kito-cheng, niosHD, sabuasal, simoncook, johnrusso, rbar, asb, hiraditya.
HsiangKai requested review of this revision.
Herald added a subscriber: MaskRay.
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Define vector compare intrinsics and lower them to V instructions.

We work with @rogfer01 from BSC to come out this patch.

Authored-by: Roger Ferrer Ibanez <rofirrim at gmail.com>
Co-Authored-by: Hsiangkai Wang <kai.wang at sifive.com>


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D93368

Files:
  llvm/include/llvm/IR/IntrinsicsRISCV.td
  llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
  llvm/test/CodeGen/RISCV/rvv/vmfeq-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vmfeq-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vmfge-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vmfge-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vmfgt-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vmfgt-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vmfle-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vmfle-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vmflt-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vmflt-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vmfne-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vmfne-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vmseq-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vmseq-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vmsgt-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vmsgt-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vmsgtu-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vmsgtu-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vmsle-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vmsle-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vmsleu-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vmsleu-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vmslt-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vmslt-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vmsltu-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vmsltu-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vmsne-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vmsne-rv64.ll



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