[PATCH] D92089: [PowerPC] Materialize i64 constants by enumerated patterns.

[EsmeYi via Phabricator via llvm-commits]

Esme marked 5 inline comments as done.
Esme added inline comments.


================
Comment at: llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:841
+  // {ones}{15-bit valve}{16 zeros}
+  if (TZ > 15 && (LZ > 32 || LO > 32))
+    return CurDAG->getMachineNode(PPC::LIS8, dl, MVT::i64,
----------------
steven.zhang wrote:
> Is it more clear to use: TZ > 15 && isInt<16>(Imm >> 16) ?
The case with the pattern of `{ones}{15-bit valve}{16 zeros}` does not equal to `TZ > 15 && isInt<16>(Imm >> 16)`.


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  https://reviews.llvm.org/D92089/new/

https://reviews.llvm.org/D92089