[llvm] 7898803 - [AMDGPU][NFC] Add more global_atomic_cmpswap tests
Sebastian Neubauer via llvm-commits
llvm-commits at lists.llvm.org
Tue Dec 15 05:54:00 PST 2020
Author: Sebastian Neubauer
Date: 2020-12-15T14:47:33+01:00
New Revision: 7898803c638497ad32e2d4a189d5597d4eb4506e
URL: https://github.com/llvm/llvm-project/commit/7898803c638497ad32e2d4a189d5597d4eb4506e
DIFF: https://github.com/llvm/llvm-project/commit/7898803c638497ad32e2d4a189d5597d4eb4506e.diff
LOG: [AMDGPU][NFC] Add more global_atomic_cmpswap tests
Added:
Modified:
llvm/test/MC/AMDGPU/flat-global.s
llvm/test/MC/AMDGPU/gfx9_asm_all.s
llvm/test/MC/Disassembler/AMDGPU/gfx10_dasm_all.txt
llvm/test/MC/Disassembler/AMDGPU/gfx9_dasm_all.txt
Removed:
################################################################################
diff --git a/llvm/test/MC/AMDGPU/flat-global.s b/llvm/test/MC/AMDGPU/flat-global.s
index e6c25f3f83f6..91c10ae13723 100644
--- a/llvm/test/MC/AMDGPU/flat-global.s
+++ b/llvm/test/MC/AMDGPU/flat-global.s
@@ -232,9 +232,29 @@ global_atomic_cmpswap v[3:4], v[5:6], off
// GFX9: global_atomic_cmpswap v[3:4], v[5:6], off ; encoding: [0x00,0x80,0x04,0xdd,0x03,0x05,0x7f,0x00]
// VI-ERR: error: instruction not supported on this GPU
-global_atomic_cmpswap_x2 v[3:4], v[5:8], off
-// GFX10: encoding: [0x00,0x80,0x44,0xdd,0x03,0x05,0x7d,0x00]
-// GFX9: global_atomic_cmpswap_x2 v[3:4], v[5:8], off ; encoding: [0x00,0x80,0x84,0xdd,0x03,0x05,0x7f,0x00]
+global_atomic_cmpswap v1, v[3:4], v[5:6], off glc
+// GFX10: encoding: [0x00,0x80,0xc5,0xdc,0x03,0x05,0x7d,0x01]
+// GFX9: global_atomic_cmpswap v1, v[3:4], v[5:6], off glc ; encoding: [0x00,0x80,0x05,0xdd,0x03,0x05,0x7f,0x01]
+// VI-ERR: error: instruction not supported on this GPU
+
+global_atomic_cmpswap v1, v3, v[5:6], s[2:3] glc
+// GFX10: encoding: [0x00,0x80,0xc5,0xdc,0x03,0x05,0x02,0x01]
+// GFX9: global_atomic_cmpswap v1, v3, v[5:6], s[2:3] glc ; encoding: [0x00,0x80,0x05,0xdd,0x03,0x05,0x02,0x01]
+// VI-ERR: error: instruction not supported on this GPU
+
+global_atomic_cmpswap_x2 v[5:6], v[7:10], off
+// GFX10: encoding: [0x00,0x80,0x44,0xdd,0x05,0x07,0x7d,0x00]
+// GFX9: global_atomic_cmpswap_x2 v[5:6], v[7:10], off ; encoding: [0x00,0x80,0x84,0xdd,0x05,0x07,0x7f,0x00]
+// VI-ERR: error: instruction not supported on this GPU
+
+global_atomic_cmpswap_x2 v[1:2], v[5:6], v[7:10], off glc
+// GFX10: encoding: [0x00,0x80,0x45,0xdd,0x05,0x07,0x7d,0x01]
+// GFX9: global_atomic_cmpswap_x2 v[1:2], v[5:6], v[7:10], off glc ; encoding: [0x00,0x80,0x85,0xdd,0x05,0x07,0x7f,0x01]
+// VI-ERR: error: instruction not supported on this GPU
+
+global_atomic_cmpswap_x2 v[1:2], v5, v[7:10], s[2:3] glc
+// GFX10: encoding: [0x00,0x80,0x45,0xdd,0x05,0x07,0x02,0x01]
+// GFX9: global_atomic_cmpswap_x2 v[1:2], v5, v[7:10], s[2:3] glc ; encoding: [0x00,0x80,0x85,0xdd,0x05,0x07,0x02,0x01]
// VI-ERR: error: instruction not supported on this GPU
global_atomic_swap v[3:4], v5, off
@@ -362,9 +382,29 @@ global_atomic_cmpswap v[3:4], v[5:6], off offset:-16
// GFX9: global_atomic_cmpswap v[3:4], v[5:6], off offset:-16 ; encoding: [0xf0,0x9f,0x04,0xdd,0x03,0x05,0x7f,0x00]
// VI-ERR: :1: error: instruction not supported on this GPU
-global_atomic_cmpswap_x2 v[3:4], v[5:8], off offset:-16
-// GFX10: encoding: [0xf0,0x8f,0x44,0xdd,0x03,0x05,0x7d,0x00]
-// GFX9: global_atomic_cmpswap_x2 v[3:4], v[5:8], off offset:-16 ; encoding: [0xf0,0x9f,0x84,0xdd,0x03,0x05,0x7f,0x00]
+global_atomic_cmpswap v1, v[3:4], v[5:6], off offset:-16 glc
+// GFX10: encoding: [0xf0,0x8f,0xc5,0xdc,0x03,0x05,0x7d,0x01]
+// GFX9: global_atomic_cmpswap v1, v[3:4], v[5:6], off offset:-16 glc ; encoding: [0xf0,0x9f,0x05,0xdd,0x03,0x05,0x7f,0x01]
+// VI-ERR: :1: error: instruction not supported on this GPU
+
+global_atomic_cmpswap v1, v3, v[5:6], s[2:3] offset:-16 glc
+// GFX10: encoding: [0xf0,0x8f,0xc5,0xdc,0x03,0x05,0x02,0x01]
+// GFX9: global_atomic_cmpswap v1, v3, v[5:6], s[2:3] offset:-16 glc ; encoding: [0xf0,0x9f,0x05,0xdd,0x03,0x05,0x02,0x01]
+// VI-ERR: :1: error: instruction not supported on this GPU
+
+global_atomic_cmpswap_x2 v[5:6], v[7:10], off offset:-16
+// GFX10: encoding: [0xf0,0x8f,0x44,0xdd,0x05,0x07,0x7d,0x00]
+// GFX9: global_atomic_cmpswap_x2 v[5:6], v[7:10], off offset:-16 ; encoding: [0xf0,0x9f,0x84,0xdd,0x05,0x07,0x7f,0x00]
+// VI-ERR: :1: error: instruction not supported on this GPU
+
+global_atomic_cmpswap_x2 v[1:2], v[5:6], v[7:10], off offset:-16 glc
+// GFX10: encoding: [0xf0,0x8f,0x45,0xdd,0x05,0x07,0x7d,0x01]
+// GFX9: global_atomic_cmpswap_x2 v[1:2], v[5:6], v[7:10], off offset:-16 glc ; encoding: [0xf0,0x9f,0x85,0xdd,0x05,0x07,0x7f,0x01]
+// VI-ERR: :1: error: instruction not supported on this GPU
+
+global_atomic_cmpswap_x2 v[1:2], v5, v[7:10], s[2:3] offset:-16 glc
+// GFX10: encoding: [0xf0,0x8f,0x45,0xdd,0x05,0x07,0x02,0x01]
+// GFX9: global_atomic_cmpswap_x2 v[1:2], v5, v[7:10], s[2:3] offset:-16 glc ; encoding: [0xf0,0x9f,0x85,0xdd,0x05,0x07,0x02,0x01]
// VI-ERR: :1: error: instruction not supported on this GPU
global_atomic_swap v[3:4], v5, off offset:-16
diff --git a/llvm/test/MC/AMDGPU/gfx9_asm_all.s b/llvm/test/MC/AMDGPU/gfx9_asm_all.s
index 3b44acb87742..21ca46885e07 100644
--- a/llvm/test/MC/AMDGPU/gfx9_asm_all.s
+++ b/llvm/test/MC/AMDGPU/gfx9_asm_all.s
@@ -4760,6 +4760,18 @@ global_atomic_cmpswap v[1:2], v[254:255], off offset:-1
global_atomic_cmpswap v[1:2], v[2:3], off
// CHECK: [0x00,0x80,0x04,0xdd,0x01,0x02,0x7f,0x00]
+global_atomic_cmpswap v1, v[2:3], v[4:5], off offset:-1 glc
+// CHECK: [0xff,0x9f,0x05,0xdd,0x02,0x04,0x7f,0x01]
+
+global_atomic_cmpswap v1, v[2:3], v[254:255], off offset:-1 glc
+// CHECK: [0xff,0x9f,0x05,0xdd,0x02,0xfe,0x7f,0x01]
+
+global_atomic_cmpswap v1, v2, v[4:5], s[2:3] offset:-1 glc
+// CHECK: [0xff,0x9f,0x05,0xdd,0x02,0x04,0x02,0x01]
+
+global_atomic_cmpswap v1, v[2:3], v[4:5], off glc
+// CHECK: [0x00,0x80,0x05,0xdd,0x02,0x04,0x7f,0x01]
+
global_atomic_add v[1:2], v2, off offset:-1
// CHECK: [0xff,0x9f,0x08,0xdd,0x01,0x02,0x7f,0x00]
@@ -4877,6 +4889,18 @@ global_atomic_cmpswap_x2 v[1:2], v[252:255], off offset:-1
global_atomic_cmpswap_x2 v[1:2], v[2:5], off
// CHECK: [0x00,0x80,0x84,0xdd,0x01,0x02,0x7f,0x00]
+global_atomic_cmpswap_x2 v[1:2], v[5:6], v[7:10], off offset:-1 glc
+// CHECK: [0xff,0x9f,0x85,0xdd,0x05,0x07,0x7f,0x01]
+
+global_atomic_cmpswap_x2 v[1:2], v[5:6], v[252:255], off offset:-1 glc
+// CHECK: [0xff,0x9f,0x85,0xdd,0x05,0xfc,0x7f,0x01]
+
+global_atomic_cmpswap_x2 v[1:2], v5, v[252:255], s[2:3] offset:-1 glc
+// CHECK: [0xff,0x9f,0x85,0xdd,0x05,0xfc,0x02,0x01]
+
+global_atomic_cmpswap_x2 v[1:2], v[5:6], v[7:10], off glc
+// CHECK: [0x00,0x80,0x85,0xdd,0x05,0x07,0x7f,0x01]
+
global_atomic_add_x2 v[1:2], v[2:3], off offset:-1
// CHECK: [0xff,0x9f,0x88,0xdd,0x01,0x02,0x7f,0x00]
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx10_dasm_all.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx10_dasm_all.txt
index 2ac611125998..fe50b4cc1ce8 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx10_dasm_all.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx10_dasm_all.txt
@@ -8102,12 +8102,24 @@
# GFX10: global_atomic_cmpswap v[3:4], v[5:6], off offset:2032 ; encoding: [0xf0,0x87,0xc4,0xdc,0x03,0x05,0x7d,0x00]
0xf0,0x87,0xc4,0xdc,0x03,0x05,0x7d,0x00
+# GFX10: global_atomic_cmpswap v1, v[3:4], v[5:6], off glc ; encoding: [0x00,0x80,0xc5,0xdc,0x03,0x05,0x7d,0x01]
+0x00,0x80,0xc5,0xdc,0x03,0x05,0x7d,0x01
+
+# GFX10: global_atomic_cmpswap v1, v3, v[5:6], s[2:3] glc ; encoding: [0x00,0x80,0xc5,0xdc,0x03,0x05,0x02,0x01]
+0x00,0x80,0xc5,0xdc,0x03,0x05,0x02,0x01
+
# GFX10: global_atomic_cmpswap_x2 v[3:4], v[5:8], off ; encoding: [0x00,0x80,0x44,0xdd,0x03,0x05,0x7d,0x00]
0x00,0x80,0x44,0xdd,0x03,0x05,0x7d,0x00
# GFX10: global_atomic_cmpswap_x2 v[3:4], v[5:8], off offset:2032 ; encoding: [0xf0,0x87,0x44,0xdd,0x03,0x05,0x7d,0x00]
0xf0,0x87,0x44,0xdd,0x03,0x05,0x7d,0x00
+# GFX10: global_atomic_cmpswap_x2 v[1:2], v[5:6], v[7:10], off glc ; encoding: [0x00,0x80,0x45,0xdd,0x05,0x07,0x7d,0x01]
+0x00,0x80,0x45,0xdd,0x05,0x07,0x7d,0x01
+
+# GFX10: global_atomic_cmpswap_x2 v[1:2], v5, v[7:10], s[2:3] glc ; encoding: [0x00,0x80,0x45,0xdd,0x05,0x07,0x02,0x01]
+0x00,0x80,0x45,0xdd,0x05,0x07,0x02,0x01
+
# GFX10: global_atomic_dec v[3:4], v5, off ; encoding: [0x00,0x80,0xf4,0xdc,0x03,0x05,0x7d,0x00]
0x00,0x80,0xf4,0xdc,0x03,0x05,0x7d,0x00
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx9_dasm_all.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx9_dasm_all.txt
index f9f9cd309330..c7c153039a76 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx9_dasm_all.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx9_dasm_all.txt
@@ -4128,6 +4128,18 @@
# CHECK: global_atomic_cmpswap v[1:2], v[2:3], off ; encoding: [0x00,0x80,0x04,0xdd,0x01,0x02,0x7f,0x00]
0x00,0x80,0x04,0xdd,0x01,0x02,0x7f,0x00
+# CHECK: global_atomic_cmpswap v1, v[2:3], v[4:5], off offset:-1 glc ; encoding: [0xff,0x9f,0x05,0xdd,0x02,0x04,0x7f,0x01]
+0xff,0x9f,0x05,0xdd,0x02,0x04,0x7f,0x01
+
+# CHECK: global_atomic_cmpswap v1, v[2:3], v[254:255], off offset:-1 glc ; encoding: [0xff,0x9f,0x05,0xdd,0x02,0xfe,0x7f,0x01]
+0xff,0x9f,0x05,0xdd,0x02,0xfe,0x7f,0x01
+
+# CHECK: global_atomic_cmpswap v1, v2, v[4:5], s[2:3] offset:-1 glc ; encoding: [0xff,0x9f,0x05,0xdd,0x02,0x04,0x02,0x01]
+0xff,0x9f,0x05,0xdd,0x02,0x04,0x02,0x01
+
+# CHECK: global_atomic_cmpswap v1, v[2:3], v[4:5], off glc ; encoding: [0x00,0x80,0x05,0xdd,0x02,0x04,0x7f,0x01]
+0x00,0x80,0x05,0xdd,0x02,0x04,0x7f,0x01
+
# CHECK: global_atomic_add v[1:2], v2, off offset:-1 ; encoding: [0xff,0x9f,0x08,0xdd,0x01,0x02,0x7f,0x00]
0xff,0x9f,0x08,0xdd,0x01,0x02,0x7f,0x00
@@ -4245,6 +4257,18 @@
# CHECK: global_atomic_cmpswap_x2 v[1:2], v[2:5], off ; encoding: [0x00,0x80,0x84,0xdd,0x01,0x02,0x7f,0x00]
0x00,0x80,0x84,0xdd,0x01,0x02,0x7f,0x00
+# CHECK: global_atomic_cmpswap_x2 v[1:2], v[5:6], v[7:10], off offset:-1 glc ; encoding: [0xff,0x9f,0x85,0xdd,0x05,0x07,0x7f,0x01]
+0xff,0x9f,0x85,0xdd,0x05,0x07,0x7f,0x01
+
+# CHECK: global_atomic_cmpswap_x2 v[1:2], v[5:6], v[252:255], off offset:-1 glc ; encoding: [0xff,0x9f,0x85,0xdd,0x05,0xfc,0x7f,0x01]
+0xff,0x9f,0x85,0xdd,0x05,0xfc,0x7f,0x01
+
+# CHECK: global_atomic_cmpswap_x2 v[1:2], v5, v[252:255], s[2:3] offset:-1 glc ; encoding: [0xff,0x9f,0x85,0xdd,0x05,0xfc,0x02,0x01]
+0xff,0x9f,0x85,0xdd,0x05,0xfc,0x02,0x01
+
+# CHECK: global_atomic_cmpswap_x2 v[1:2], v[5:6], v[7:10], off glc ; encoding: [0x00,0x80,0x85,0xdd,0x05,0x07,0x7f,0x01]
+0x00,0x80,0x85,0xdd,0x05,0x07,0x7f,0x01
+
# CHECK: global_atomic_add_x2 v[1:2], v[2:3], off offset:-1 ; encoding: [0xff,0x9f,0x88,0xdd,0x01,0x02,0x7f,0x00]
0xff,0x9f,0x88,0xdd,0x01,0x02,0x7f,0x00
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