[PATCH] D93218: [RISCV] Define vminu/vmin/vmaxu/vmax intrinsics.

[Hsiangkai Wang via Phabricator via llvm-commits]

HsiangKai updated this revision to Diff 311822.
HsiangKai edited the summary of this revision.
HsiangKai added a comment.

Update test cases.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D93218/new/

https://reviews.llvm.org/D93218

Files:
  llvm/include/llvm/IR/IntrinsicsRISCV.td
  llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
  llvm/test/CodeGen/RISCV/rvv/vmax-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vmax-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vmaxu-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vmaxu-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vmin-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vmin-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vminu-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vminu-rv64.ll

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