[PATCH] D86203: [GlobalISel][TableGen] Add handling of unannotated dst pattern ops

[Gabriel Hjort Åkerlund via Phabricator via llvm-commits]

ehjogab added a comment.

Hm, I had another look at this and it seems that it's enough to provide either a register class or a value type. In both cases you enter the same if condition (line 4433 in llvm/utils/TableGen/GlobalISelEmitter.cpp), which checks that the child record is either a RegisterClass, RegisterOperand, or ValueType. If the check passes, it will output a GIR_COPY, which just copies the operand from one instruction (the one matched) to another (the instruction to emit) and hence does not look at the register class of the destination (that seems to be taken care of at a later stage, which does not look at the annotation of the operand in the pattern).

In other words, as long as the operand in the destination pattern is annotated with either register class or register value, TableGen will not reject the pattern. In light of this, maybe it's a better idea to look for the corresponding operand in the source pattern and try to copy its annotation (like bjope suggested).


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  https://reviews.llvm.org/D86203/new/

https://reviews.llvm.org/D86203