[PATCH] D93175: [RISCV] Define vadc/vmadc/vsbc/vmsbc intrinsics.
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Dec 14 14:59:20 PST 2020
craig.topper added a comment.
Do we need to use a NoV0 register class for the output on the vadc/vsbc instructions that have a carry in? from the spec "For vadc and vsbc, an illegal instruction exception is raised if the destination vector register is v0."
I think we might also need early clobber on vmadc/vmsbc? Maybe NoV0 on the one with carry out and carry in as well?
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