[PATCH] D92385: [ARM] Add a pass that re-arranges blocks when there is a backwards WLS branch

Dave Green via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Dec 14 02:32:40 PST 2020


dmgreen added inline comments.


================
Comment at: llvm/lib/Target/ARM/ARM.h:63
 
 void initializeARMParallelDSPPass(PassRegistry &);
 void initializeARMLoadStoreOptPass(PassRegistry &);
----------------
Add one of these for the new pass, and call it in LLVMInitializeARMTarget.


================
Comment at: llvm/lib/Target/ARM/ARMBlockPlacement.cpp:36
+
+static RegisterPass<ARMBlockPlacement> X(DEBUG_TYPE, "ARM block placement",
+                                         false, false);
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I've not seen many things use RegisterPass before. Can this use the `INITIALIZE_PASS` like most other passes do?


================
Comment at: llvm/lib/Target/ARM/ARMTargetMachine.cpp:551
   }));
 
   // Don't optimize barriers at -O0.
----------------
Add the pass here I think. That way we will have better size estimates from shrinking T2 instructions (and IT blocks should not be a problem for the pass, as far as I understand).


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D92385/new/

https://reviews.llvm.org/D92385



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