[llvm] f61e5ec - [X86] Avoid data16 prefix for lea in x32 mode

[Harald van Dijk via llvm-commits]

Author: Harald van Dijk
Date: 2020-12-12T17:05:24Z
New Revision: f61e5ecb919b3901590328e69d3e4a557eefd788

URL: https://github.com/llvm/llvm-project/commit/f61e5ecb919b3901590328e69d3e4a557eefd788
DIFF: https://github.com/llvm/llvm-project/commit/f61e5ecb919b3901590328e69d3e4a557eefd788.diff

LOG: [X86] Avoid data16 prefix for lea in x32 mode

The ABI demands a data16 prefix for lea in 64-bit LP64 mode, but not in
64-bit ILP32 mode. In both modes this prefix would ordinarily be
ignored, but the instructions may be changed by the linker to
instructions that are affected by the prefix.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D93157

Added: 
    

Modified: 
    llvm/lib/Target/X86/X86MCInstLower.cpp
    llvm/test/CodeGen/X86/pic.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/X86/X86MCInstLower.cpp b/llvm/lib/Target/X86/X86MCInstLower.cpp
index 6602d819929e..29faaa2dad36 100644
--- a/llvm/lib/Target/X86/X86MCInstLower.cpp
+++ b/llvm/lib/Target/X86/X86MCInstLower.cpp
@@ -979,6 +979,8 @@ void X86AsmPrinter::LowerTlsAddr(X86MCInstLower &MCInstLowering,
   NoAutoPaddingScope NoPadScope(*OutStreamer);
   bool Is64Bits = MI.getOpcode() != X86::TLS_addr32 &&
                   MI.getOpcode() != X86::TLS_base_addr32;
+  bool Is64BitsLP64 = MI.getOpcode() == X86::TLS_addr64 ||
+                      MI.getOpcode() == X86::TLS_base_addr64;
   MCContext &Ctx = OutStreamer->getContext();
 
   MCSymbolRefExpr::VariantKind SRVK;
@@ -1012,7 +1014,7 @@ void X86AsmPrinter::LowerTlsAddr(X86MCInstLower &MCInstLowering,
 
   if (Is64Bits) {
     bool NeedsPadding = SRVK == MCSymbolRefExpr::VK_TLSGD;
-    if (NeedsPadding)
+    if (NeedsPadding && Is64BitsLP64)
       EmitAndCountInstruction(MCInstBuilder(X86::DATA16_PREFIX));
     EmitAndCountInstruction(MCInstBuilder(X86::LEA64r)
                                 .addReg(X86::RDI)

diff  --git a/llvm/test/CodeGen/X86/pic.ll b/llvm/test/CodeGen/X86/pic.ll
index 3f3417e89ad8..101c749633bc 100644
--- a/llvm/test/CodeGen/X86/pic.ll
+++ b/llvm/test/CodeGen/X86/pic.ll
@@ -285,6 +285,7 @@ entry:
 ; CHECK-I686-DAG:	calll	___tls_get_addr at PLT
 ; CHECK-I686-DAG:	leal	tlssrcgd at TLSGD(,%ebx), %eax
 ; CHECK-I686-DAG:	calll	___tls_get_addr at PLT
+; CHECK-X32-NOT:	data16
 ; CHECK-X32-DAG:	leaq	tlsdstgd at TLSGD(%rip), %rdi
 ; CHECK-X32-DAG:	callq	__tls_get_addr at PLT
 ; CHECK-X32-DAG:	leaq	tlsptrgd at TLSGD(%rip), %rdi