[PATCH] D93157: [X86] Avoid data16 prefix for lea in x32 mode
Harald van Dijk via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sat Dec 12 04:33:33 PST 2020
hvdijk created this revision.
hvdijk added reviewers: craig.topper, RKSimon.
Herald added subscribers: pengfei, hiraditya.
hvdijk requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.
The ABI demands a data16 prefix for lea in 64-bit LP64 mode, but not in
64-bit ILP32 mode. In both modes this prefix would ordinarily be
ignored, but the instructions may be changed by the linker to
instructions that are affected by the prefix.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D93157
Files:
llvm/lib/Target/X86/X86MCInstLower.cpp
llvm/test/CodeGen/X86/pic.ll
Index: llvm/test/CodeGen/X86/pic.ll
===================================================================
--- llvm/test/CodeGen/X86/pic.ll
+++ llvm/test/CodeGen/X86/pic.ll
@@ -285,6 +285,7 @@
; CHECK-I686-DAG: calll ___tls_get_addr at PLT
; CHECK-I686-DAG: leal tlssrcgd at TLSGD(,%ebx), %eax
; CHECK-I686-DAG: calll ___tls_get_addr at PLT
+; CHECK-X32-NOT: data16
; CHECK-X32-DAG: leaq tlsdstgd at TLSGD(%rip), %rdi
; CHECK-X32-DAG: callq __tls_get_addr at PLT
; CHECK-X32-DAG: leaq tlsptrgd at TLSGD(%rip), %rdi
Index: llvm/lib/Target/X86/X86MCInstLower.cpp
===================================================================
--- llvm/lib/Target/X86/X86MCInstLower.cpp
+++ llvm/lib/Target/X86/X86MCInstLower.cpp
@@ -979,6 +979,8 @@
NoAutoPaddingScope NoPadScope(*OutStreamer);
bool Is64Bits = MI.getOpcode() != X86::TLS_addr32 &&
MI.getOpcode() != X86::TLS_base_addr32;
+ bool Is64BitsLP64 = MI.getOpcode() == X86::TLS_addr64 ||
+ MI.getOpcode() == X86::TLS_base_addr64;
MCContext &Ctx = OutStreamer->getContext();
MCSymbolRefExpr::VariantKind SRVK;
@@ -1012,7 +1014,7 @@
if (Is64Bits) {
bool NeedsPadding = SRVK == MCSymbolRefExpr::VK_TLSGD;
- if (NeedsPadding)
+ if (NeedsPadding && Is64BitsLP64)
EmitAndCountInstruction(MCInstBuilder(X86::DATA16_PREFIX));
EmitAndCountInstruction(MCInstBuilder(X86::LEA64r)
.addReg(X86::RDI)
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