[PATCH] D93013: [RISCV] Define vadd/vsub/vrsub intrinsics and lower to V instructions.

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


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Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td:231
                          LMULInfo MInfo> {
   def "_" # MInfo.MX : VPseudoBinary<RetClass, Op1Class, Op2Class>;
   def "_" # MInfo.MX # "_MASK" : VPseudoBinaryMask<RetClass, Op1Class, Op2Class>;
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It's weird that we have a multiclass and a class both named VPseudoBinary. It works because they are considered difference namespaces by tablegen. But it makes the file hard to navigate for a human.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D93013/new/

https://reviews.llvm.org/D93013