[PATCH] D93050: [SVE][CodeGen] Lower scalable floating-point vector reductions

[Kerry McLaughlin via Phabricator via llvm-commits]

kmclaughlin marked an inline comment as not done.
kmclaughlin added inline comments.


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Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:16820
+  if (SrcVT.isScalableVector() && SrcVT.isFloatingPoint())
+    RdxVT = SrcVT;
 
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cameron.mcinally wrote:
> Nit: We could conditionally avoid the call to `getPackedSVEVectorVT(...)` by inverting this condition and initial value of RdxVT. Something like:
> 
> ```
>   EVT RdxVT = SrcVT; 
>   if (SrcVT.isFixedVector() || SrcVT.isInteger())
>     RdxVT = getPackedSVEVectorVT(ResVT);
> ```
> 
> I also wonder if we need the `isFloatingPoint()/isInteger()` check at all. Is just `isScalableVector()` enough?
Hi @cameron.mcinally , I've inverted the condition as you suggested here and removed the isFloatingPoint() check. The reason I included the additional check was for UADDV, where the result type should always be `nxv2i64`. Though as it's the only case for scalable vectors that needs to use `getPackedSVEVectorVT`, I've added a check for the UADDV_PRED opcode here instead.


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https://reviews.llvm.org/D93050