[PATCH] D93013: [RISCV] Define vadd/vsub/vrsub intrinsics and lower to V instructions.
    Hsiangkai Wang via Phabricator via llvm-commits 
    llvm-commits at lists.llvm.org
       
    Fri Dec 11 01:15:24 PST 2020
    
    
  
HsiangKai updated this revision to Diff 311136.
HsiangKai added a comment.
Refine the class name in IntrinsicsRISCV.td.
Repository:
  rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D93013/new/
https://reviews.llvm.org/D93013
Files:
  llvm/include/llvm/IR/IntrinsicsRISCV.td
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/lib/Target/RISCV/RISCVISelLowering.h
  llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
  llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
  llvm/lib/Target/RISCV/RISCVRegisterInfo.td
  llvm/lib/Target/RISCV/Utils/RISCVBaseInfo.cpp
  llvm/lib/Target/RISCV/Utils/RISCVBaseInfo.h
  llvm/test/CodeGen/RISCV/rvv/vadd.ll
  llvm/test/CodeGen/RISCV/rvv/vrsub.ll
  llvm/test/CodeGen/RISCV/rvv/vsub.ll
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