[PATCH] D93012: [RISCV] Separate masked and unmasked definitions for pseudo instructions.

[Hsiangkai Wang via Phabricator via llvm-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG5aa584ec713c: [RISCV] Separate masked and unmasked definitions for pseudo instructions. (authored by HsiangKai).

Changed prior to commit:
  https://reviews.llvm.org/D93012?vs=310848&id=311110#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D93012/new/

https://reviews.llvm.org/D93012

Files:
  llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
  llvm/lib/Target/RISCV/RISCVMCInstLower.cpp
  llvm/test/CodeGen/RISCV/rvv/add-vsetvli-gpr.mir
  llvm/test/CodeGen/RISCV/rvv/add-vsetvli-vlmax.ll

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