[PATCH] D93019: [RISCV] Add support for 'pause' as an alias for 'fence w, 0'
Michael Munday via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Dec 10 03:17:51 PST 2020
mundaym created this revision.
mundaym added reviewers: asb, luismarques, lenary.
Herald added subscribers: frasercrmck, NickHung, evandro, apazos, sameer.abuasal, pzheng, s.egerton, Jim, benna, psnobl, jocewei, PkmX, jfb, the_o, brucehoult, MartinMosbeck, rogfer01, edward-jones, zzheng, jrtc27, shiva0217, kito-cheng, niosHD, sabuasal, simoncook, johnrusso, rbar, hiraditya.
mundaym requested review of this revision.
Herald added subscribers: llvm-commits, MaskRay.
Herald added a project: LLVM.
Do not merge:
1. the pause hint is still in the proposal stage (https://github.com/riscv/riscv-isa-manual/pull/398)
2. the syntax for representing empty sets in fence operands is not yet finalized (likely to be either 0, as in this patch, or -)
Add support for the 'pause' hint instruction as an alias for
'fence w, 0'. To do this allow the 'fence' operands pred and succ
to be set to 0 (the empty set). This will also allow future hints
to be encoded as 'fence 0, <x>' and 'fence <x>, 0'.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D93019
Files:
llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp
llvm/lib/Target/RISCV/RISCVInstrInfo.td
llvm/test/MC/RISCV/rv32i-invalid.s
llvm/test/MC/RISCV/rv32i-valid.s
llvm/test/MC/RISCV/rvi-aliases-valid.s
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