[PATCH] D86203: [GlobalISel][TableGen] Add handling of unannotated dst pattern ops

[Bjorn Pettersson via Phabricator via llvm-commits]

bjope added a comment.

But if I understand this patch correctly it has tried to derive the type from "some_isnt" when it is omitted, rather than reusing the type from the source pattern. Would it make more sense to infer the type from the source pattern instead of from the target instruction when it is omitted? Is that possible?

I mean, as far as I can tell the output from the emitter is the same if specifying the register class or just the type from the source pattern.

Example:

  def RC : RegisterClass<"MyTarget", [i32], 32, (add R0)>;
  
  // This works with both SelectionDAGISel and GISel:
  def : Pat<(add RC:$src1, RC:$src2),
            (some_inst RC:$src1, RC:$src2)>;
  
  // This works with both SelectionDAGISel and GISel:
  def : Pat<(add i32:$src1, i32:$src2),
            (some_inst i32:$src1, i32:$src2)>;
  
  // This is currently not supported by GISel:
  def : Pat<(add i32:$src1, i32:$src2),
            (some_inst $src1, $src2)>;
  
  // This is currently not supported by GISel:
  def : Pat<(add RC:$src1, RC:$src2),
            (some_inst $src1, $src2)>;


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D86203/new/

https://reviews.llvm.org/D86203