[PATCH] D93013: [RISCV] Define vadd intrinsics and lower to V instructions.
Hsiangkai Wang via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Dec 10 01:54:56 PST 2020
HsiangKai created this revision.
HsiangKai added reviewers: craig.topper, evandro, frasercrmck, luismarques, rogfer01.
Herald added subscribers: NickHung, apazos, sameer.abuasal, pzheng, s.egerton, lenary, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, edward-jones, zzheng, jrtc27, shiva0217, kito-cheng, niosHD, sabuasal, simoncook, johnrusso, rbar, asb, hiraditya.
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Demonstrate how to model RISC-V V intrinsics and lower them to V instructions.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D93013
Files:
llvm/include/llvm/IR/IntrinsicsRISCV.td
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
llvm/lib/Target/RISCV/RISCVISelLowering.h
llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
llvm/test/CodeGen/RISCV/rvv/vadd.ll
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