[PATCH] D92935: Introduce support for PowerPC devices with an Embedded Floating-point APU version 2 (efpu2)

[Michael Kiausch via Phabricator via llvm-commits]

kiausch created this revision.
kiausch added reviewers: nemanjai, jhibbits.
Herald added subscribers: dang, steven.zhang, shchenz, kbarton, hiraditya.
kiausch requested review of this revision.
Herald added projects: clang, LLVM.
Herald added subscribers: llvm-commits, cfe-commits.

PowerPC cores like e200z759n3 [1] using an efpu2 only support single precision hardware floating point instructions.
The single precision instructions efs* and evfs* are identical to the spe float instructions while efd* and evfd* instructions trigger a not implemented exception.

This patch introduces a new command line option -mefpu2 which leads to single-hardware / double-software code generation.

I added a regression test efpu2.ll based on spe.ll where all single tests are identical to the tests in spe.ll while the double tests taken from spe.ll were modified to basically check that the correct library calls are generated.

[1] Core reference: https://www.nxp.com/files-static/32bit/doc/ref_manual/e200z759CRM.pdf


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D92935

Files:
  clang/include/clang/Driver/Options.td
  llvm/lib/Target/PowerPC/PPC.td
  llvm/lib/Target/PowerPC/PPCISelLowering.cpp
  llvm/lib/Target/PowerPC/PPCISelLowering.h
  llvm/lib/Target/PowerPC/PPCSubtarget.h
  llvm/test/CodeGen/PowerPC/efpu2.ll

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