[PATCH] D92907: [RegisterClassInfo] Return non-zero for RC without allocatable reg

Jinsong Ji via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Dec 8 20:15:10 PST 2020


jsji created this revision.
jsji added reviewers: echristo, atrick, MatzeB.
Herald added subscribers: steven.zhang, hiraditya, nemanjai.
jsji requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.

In some case, the RC may have 0 allocatable reg.
eg: VRSAVERC in PowerPC, which has only 1 reg, but it is also reserved.

The curreent implementation will keep calling the computePSetLimit because
getRegPressureSetLimit assume computePSetLimit will return a non-zero value.

The fix simply early return the value from TableGen for such special case.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D92907

Files:
  llvm/lib/CodeGen/RegisterClassInfo.cpp
  llvm/test/CodeGen/PowerPC/compute-regpressure.ll


Index: llvm/test/CodeGen/PowerPC/compute-regpressure.ll
===================================================================
--- llvm/test/CodeGen/PowerPC/compute-regpressure.ll
+++ llvm/test/CodeGen/PowerPC/compute-regpressure.ll
@@ -1,7 +1,7 @@
 ; REQUIRES: asserts
 ; RUN: llc -debug-only=regalloc < %s 2>&1 |FileCheck %s --check-prefix=DEBUG
 
-; DEBUG-COUNT-3:         AllocationOrder(VRSAVERC) = [ ]
+; DEBUG-COUNT-1:         AllocationOrder(VRSAVERC) = [ ]
 
 target triple = "powerpc64le-unknown-linux-gnu"
 
Index: llvm/lib/CodeGen/RegisterClassInfo.cpp
===================================================================
--- llvm/lib/CodeGen/RegisterClassInfo.cpp
+++ llvm/lib/CodeGen/RegisterClassInfo.cpp
@@ -188,6 +188,8 @@
   }
   assert(RC && "Failed to find register class");
   compute(RC);
+  if (getNumAllocatableRegs(RC) == 0)
+    return TRI->getRegPressureSetLimit(*MF, Idx);
   unsigned NReserved = RC->getNumRegs() - getNumAllocatableRegs(RC);
   return TRI->getRegPressureSetLimit(*MF, Idx) -
          TRI->getRegClassWeight(RC).RegWeight * NReserved;


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