[PATCH] D92813: [RISCV] Share VTYPE encoding code between the assembler and the CustomInserter for adding VSETVLI before vector instructions

[Fraser Cormack via Phabricator via llvm-commits]

frasercrmck added a comment.

I had actually prototyped something very similar so I'm all for this.



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Comment at: llvm/lib/Target/RISCV/Utils/RISCVBaseInfo.h:363
 
+inline static unsigned encodeVTYPE(RISCVVLMUL VLMUL, RISCVVSEW VSEW,
+                                   bool TailAgnostic, bool MaskedoffAgnostic) {
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I think that it would help to be explicit (in a comment) that this operand encoding is the same as the vtype binary encoding and is assumed to be so in the MC layers.


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  https://reviews.llvm.org/D92813/new/

https://reviews.llvm.org/D92813