[PATCH] D92707: [AArch64][GlobalISel] Narrow 128-bit regs to 64-bit regs in emitTestBit
Amara Emerson via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Dec 7 11:21:18 PST 2020
aemerson accepted this revision.
aemerson added inline comments.
This revision is now accepted and ready to land.
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Comment at: llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp:5650
-Register AArch64InstructionSelector::narrowExtendRegIfNeeded(
- Register ExtReg, MachineIRBuilder &MIB) const {
+Register AArch64InstructionSelector::narrowOrWidenScalarIfNeeded(
+ Register Reg, const TargetRegisterClass &RC,
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paquette wrote:
> aemerson wrote:
> > This function is confusing to me now. It's called narrowOrWidenScalar but no actual widening or narrowing happens. If selectCopy really does handle these then I think we need a comment explaining that. Also, maybe this could be renamed to something like `moveToGPRRegClass()`? I'm not sure if it's better though. What do you think?
> Maybe just `moveToRegClass`?
It doesn't handle vectors so I think having some reference to scalar or GPR is needed. I'll leave it up to you for the exact name.
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https://reviews.llvm.org/D92707/new/
https://reviews.llvm.org/D92707
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