[PATCH] D92750: [VE] Add vrcp, vrsqrt, vcvt, vmrg, and vshf intrinsic instructions

Simon Moll via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Dec 7 03:00:33 PST 2020


simoll accepted this revision.
simoll added a comment.
This revision is now accepted and ready to land.

I think we can do a better job when it comes to the intrinsic attributes.. eg there should be `nosync` on all vector arithmetic intrinsics, also `readnone` inaccurately obscures the dependence of floating-point ops on the rounding/exception mode configured in the PSW register.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D92750/new/

https://reviews.llvm.org/D92750



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