[PATCH] D92707: [AArch64][GlobalISel] Narrow 128-bit regs to 64-bit regs in emitTestBit
    Amara Emerson via Phabricator via llvm-commits 
    llvm-commits at lists.llvm.org
       
    Fri Dec  4 23:46:12 PST 2020
    
    
  
aemerson added inline comments.
================
Comment at: llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp:5650
 
-Register AArch64InstructionSelector::narrowExtendRegIfNeeded(
-    Register ExtReg, MachineIRBuilder &MIB) const {
+Register AArch64InstructionSelector::narrowOrWidenScalarIfNeeded(
+    Register Reg, const TargetRegisterClass &RC,
----------------
This function is confusing to me now. It's called narrowOrWidenScalar but no actual widening or narrowing happens. If selectCopy really does handle these then I think we need a comment explaining that. Also, maybe this could be renamed to something like `moveToGPRRegClass()`? I'm not sure if it's better though. What do you think?
CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D92707/new/
https://reviews.llvm.org/D92707
    
    
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