[PATCH] D91781: [VE] Add regression test for D91151

[Kazushi Marukawa via Phabricator via llvm-commits]

kaz7 added a comment.

I was inspecting why this problem happens iff the case of `atomic_load_32` and `switch`.  This problem doesn't happen if we have only `atomic_load_32` here.  The reason of this is that our implementation.  We have optimizing ISel patterns for `(i64 (zext (atomic_load_32 ...)))` and `(i64 (sext (atomic_load_32 ...)))`, but not for `(i64 (anyext (atomic_load_32 ...)))`.  This is the reason why this problem happens iff we have `switch` here.  This `switch` is converted to `br_cc` and a jump-table.  Our implementation of `br_cc` requires `zext` to i64 here (This is another point for optimization in future).

Then, we have following patterns.  Why does this problem happen iff we have `atomic_load_32` and `zext`?

  def: Pat<(atomic_load_8 ADDRrri, ...), ...>;
  def: Pat<(atomic_load_8 ADDRzii, ...), ...>;   <-- problem doesn't happen here
  def: Pat<(atomic_load_32 ADDRrri, ...), ...>;  <-- This matches for `(anyext (atomic_load_32 ...))`
  def: Pat<(atomic_load_32 ADDRzii, ...), ...>;
  def: Pat<(i64 (zext (atomic_load_8 ADDRrri, ...))), ...>;
  def: Pat<(i64 (zext (atomic_load_8 ADDRzii, ...))), ...>;  <-- problem happens here
  def: Pat<(i64 (zext (atomic_load_32 ADDRrri, ...))), ...>;
  def: Pat<(i64 (zext (atomic_load_32 ADDRzii, ...))), ...>;  <-- This will match for `(zext (atomic_load_32 ...))`

This is not clear for me, but ISel works like this: if ISel is searching matching pattern for `(atomic_load_32 ...)`, ISel skips patterns for `atomic_load_8` completely.  However, if ISel is searching for `(i64 (zext (atomic_load_32 ...)))`, ISel inspect `(i64 (zext (atomic_load_8 ...)))` patterns throughly and hit `(i64 (zext (atomic_load_8 ADDRzii, ...)))` pattern.  This cause the problem.

As a conclusion, I can say this regression test is enoughly simplified and it shows an essential of this problem.  So, I'd like to apply this patch and use it to detect future problems.

Thank you very much, @dblaikie, to help us!


Repository:
  rG LLVM Github Monorepo

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https://reviews.llvm.org/D91781