[PATCH] D92538: [RISCV] Merge FMV_H_X_RV32/FMV_H_X_RV64 into a single opcode. Same with FMV_X_ANYEXTH_RV32/RV64

[Jessica Clarke via Phabricator via llvm-commits]

jrtc27 added inline comments.


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Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoZfh.td:344
 /// Float conversion operations
 // f32 -> f16, f16 -> f32
 def : Pat<(fpround FPR32:$rs1), (FCVT_H_S FPR32:$rs1, 0b111)>;
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Hm, looking at the other files this really should have had a blank line above it, which is more important now you're adding a new set of patterns to the conversion operations "section".


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Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoZfh.td:348
 
+def : Pat<(riscv_fmv_h_x GPR:$src), (FMV_H_X GPR:$src)>;
+def : Pat<(riscv_fmv_x_anyexth FPR16:$src), (FMV_X_H FPR16:$src)>;
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This could do with a comment; F has `// Moves (no conversion)` for its `bitcast`s.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D92538/new/

https://reviews.llvm.org/D92538