[PATCH] D91937: [ISel] Port AArch64 SABD and UABD to DAGCombine

[Dave Green via Phabricator via llvm-commits]

dmgreen added inline comments.


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Comment at: llvm/include/llvm/Target/TargetSelectionDAG.td:362
+def abds       : SDNode<"ISD::ABDS"      , SDTIntBinOp, []>;
+def abdu       : SDNode<"ISD::ABDU"      , SDTIntBinOp, []>;
 def smullohi   : SDNode<"ISD::SMUL_LOHI" , SDTIntBinHiLoOp, [SDNPCommutative]>;
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RKSimon wrote:
> RKSimon wrote:
> > Can't these be commutative ?
> alive2 says yes: https://alive2.llvm.org/ce/z/8giJFY
Aye, I agree. Sorry I have not gotten back to this yet, and didn't have time over the weekend to update it. I'll try and do so soon.

I did happen to talk to someone how implemented the same thing in gcc and apparently they represent it as max(a, b) - min(a, b). Which I thought was nifty but does show how the whole thing can be commutative.


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  https://reviews.llvm.org/D91937/new/

https://reviews.llvm.org/D91937