[PATCH] D92465: [PowerPC] Implement intrinsic for DARN instruction

Qiu Chaofan via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Dec 1 23:47:22 PST 2020


qiucf created this revision.
qiucf added reviewers: steven.zhang, nemanjai, jsji, PowerPC.
Herald added subscribers: llvm-commits, shchenz, kbarton, hiraditya.
Herald added a project: LLVM.
qiucf requested review of this revision.

Instruction `darn` was introduced in ISA 3.0. It means 'Deliver A Random Number'.

The immediate number `L` means:

- L=0, the generated random number is 32-bit (higher 32-bits are all-zero)
- L=1, the generated random number is 'conditioned' (processed by hardware to reduce bias)
- L=2, the generated random number is not conditioned, directly from noise source

GCC implements them in three separate intrinsics. (`__builtin_darn`, `__builtin_darn_32` and `__builtin_darn_raw`)

This patch also addresses Bugzilla PR39800 <https://bugs.llvm.org/show_bug.cgi?id=39800>.


https://reviews.llvm.org/D92465

Files:
  clang/include/clang/Basic/BuiltinsPPC.def
  clang/test/CodeGen/builtins-ppc.c
  llvm/include/llvm/IR/IntrinsicsPowerPC.td
  llvm/lib/Target/PowerPC/PPCInstr64Bit.td
  llvm/test/CodeGen/PowerPC/builtins-ppc-p9-darn.ll

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