[PATCH] D91845: [PowerPC] Fix FLT_ROUNDS_ on little endian

[Qing Shan Zhang via Phabricator via llvm-commits]

steven.zhang added inline comments.


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Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:8942
+  SDValue CWD;
+  if (Subtarget.isPPC64()) {
+    CWD = DAG.getNode(ISD::TRUNCATE, dl, MVT::i32,
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Is it better to check the type legal for i64 ? We cannot do this for PPC32 is because that, the i64 is not legal and we are not allowed to produce the illegal type during legalizeOp.


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Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:8946
+  } else {
+    // Save FP register to stack slot
+    int SSFI = MF.getFrameInfo().CreateStackObject(8, Align(8), false);
----------------
Add an assertion here:
assert(hasBigEndianPartOrdering(...))


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D91845/new/

https://reviews.llvm.org/D91845