[PATCH] D90738: [RISCV] Support Zfh half-precision floating-point extension.

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:524
+    } else if (Op.getValueType() == MVT::f32 && Subtarget.is64Bit() &&
+        Subtarget.hasStdExtF()) {
+      if (Op0.getValueType() != MVT::i32)
----------------
This line needs to be indented further


================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:1116
+    } else if (N->getValueType(0) == MVT::i32 && Subtarget.is64Bit() &&
+        Subtarget.hasStdExtF()) {
+      if (Op0.getValueType() != MVT::f32)
----------------
Same here


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D90738/new/

https://reviews.llvm.org/D90738