[PATCH] D92420: [PowerPC] Exploitation of xxeval instruction for AND and NAND
Nemanja Ivanovic via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Dec 1 16:44:36 PST 2020
nemanjai added a comment.
LGTM as long as the test case is updated.
================
Comment at: llvm/lib/Target/PowerPC/PPCInstrPrefix.td:2580
+ // AND
+ def : Pat<(v4i32 (and v4i32:$vA, (and v4i32:$vB, v4i32:$vC))),
+ (v4i32 (XXEVAL $vA, $vB, $vC, 1))>;
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I assume that we legalize bitwise operations on vectors by promoting everything to `v4i32`. If so, these patterns are perfectly fine. However, some of the test cases should use different types.
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https://reviews.llvm.org/D92420/new/
https://reviews.llvm.org/D92420
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