[PATCH] D92420: [PowerPC] Exploitation of xxeval instruction for AND and NAND

Stefan Pintilie via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Dec 1 12:37:23 PST 2020


stefanp created this revision.
stefanp added reviewers: nemanjai, lei.
Herald added subscribers: shchenz, kbarton, hiraditya.
Herald added a project: LLVM.
stefanp requested review of this revision.

The xxeval instruction was intorduced in Power PC in Power 10.
The instruction accepts three vector registers and an immediate.
Depending on the value of the immediate the instruction can be used
to perform certain bitwise boolean operations (and, or, xor, ...) on
the given vector registers.

This patch implements the AND and NAND patterns that can be used by
the instruction.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D92420

Files:
  llvm/lib/Target/PowerPC/PPCInstrPrefix.td
  llvm/test/CodeGen/PowerPC/xxeval-and-nand.ll

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