[llvm] cbbd702 - [RISCV] Only combine (or (GREVI x, shamt), x) -> GORCI if shamt is a power of 2.

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2020-11-30T08:10:39-08:00
New Revision: cbbd7021f176d1344fb4d71d492ccc6017f98151

URL: https://github.com/llvm/llvm-project/commit/cbbd7021f176d1344fb4d71d492ccc6017f98151
DIFF: https://github.com/llvm/llvm-project/commit/cbbd7021f176d1344fb4d71d492ccc6017f98151.diff

LOG: [RISCV] Only combine (or (GREVI x, shamt), x) -> GORCI if shamt is a power of 2.

GORCI performs an OR between each stage. So we need to ensure only
one stage is active before doing this combine.

Initial attempts at finding a test case for this failed due to
the order things get combined. It's most likely that we'll form
one stage of GREVI then combine to GORCI before the two stages of
GREVI are able to be formed and combined with each other to form
a multi stage GREVI.

Differential Revision: https://reviews.llvm.org/D92289

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVISelLowering.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index 7a0d7979d200..380b1a7d9c42 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -1238,8 +1238,8 @@ static SDValue combineORToGREV(SDValue Op, SelectionDAG &DAG,
 }
 
 // Matches any the following pattern as a GORCI(W) operation
-// 1.  (or (GREVI x, shamt), x)
-// 2.  (or x, (GREVI x, shamt))
+// 1.  (or (GREVI x, shamt), x) if shamt is a power of 2
+// 2.  (or x, (GREVI x, shamt)) if shamt is a power of 2
 // 3.  (or (or (BITMANIP_SHL x), x), (BITMANIP_SRL x))
 // Note that with the variant of 3.,
 //     (or (or (BITMANIP_SHL x), (BITMANIP_SRL x)), x)
@@ -1258,7 +1258,8 @@ static SDValue combineORToGORC(SDValue Op, SelectionDAG &DAG,
     for (const auto &OpPair :
          {std::make_pair(Op0, Op1), std::make_pair(Op1, Op0)}) {
       if (OpPair.first.getOpcode() == RISCVISD::GREVI &&
-          OpPair.first.getOperand(0) == OpPair.second)
+          OpPair.first.getOperand(0) == OpPair.second &&
+          isPowerOf2_32(OpPair.first.getConstantOperandVal(1)))
         return DAG.getNode(RISCVISD::GORCI, DL, VT, OpPair.second,
                            OpPair.first.getOperand(1));
     }