[PATCH] D92286: [RISCV] Form GORCI from (or (rotl/rotr X, Bitwidth/2), X).

[Craig Topper via Phabricator via llvm-commits]

craig.topper created this revision.
craig.topper added reviewers: frasercrmck, asb, lenary, luismarques.
Herald added subscribers: NickHung, evandro, apazos, sameer.abuasal, pzheng, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, rogfer01, edward-jones, zzheng, jrtc27, shiva0217, kito-cheng, niosHD, sabuasal, simoncook, johnrusso, rbar, hiraditya.
Herald added a project: LLVM.
craig.topper requested review of this revision.
Herald added a subscriber: MaskRay.

A rotate by half the bitwidth swaps the bottom and top half which is the same as one of the MSB GREVI stage.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D92286

Files:
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/test/CodeGen/RISCV/rv32Zbp.ll
  llvm/test/CodeGen/RISCV/rv64Zbp.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D92286.308229.patch
Type: text/x-patch
Size: 6651 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20201129/350ed0d2/attachment.bin>