[PATCH] D92206: [msan] Fix bugs when instrument x86.avx512*_cvt* intrinsics.

[Pengfei Wang via Phabricator via llvm-commits]

pengfei created this revision.
pengfei added reviewers: eugenis, pcc, mmalcomson, craig.topper.
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Scalar intrinsics x86.avx512*_cvt* have an extra rounding mode operand.
We can directly ignore it to reuse the SSE/AVX math.
This fix the bug https://bugs.llvm.org/show_bug.cgi?id=48298.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D92206

Files:
  llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
  llvm/test/Instrumentation/MemorySanitizer/vector_cvt.ll
  llvm/utils/FileCheck/FileCheck.cpp


Index: llvm/utils/FileCheck/FileCheck.cpp
===================================================================
--- llvm/utils/FileCheck/FileCheck.cpp
+++ llvm/utils/FileCheck/FileCheck.cpp
@@ -78,7 +78,7 @@
              "checks that some error message does not occur, for example."));
 
 static cl::opt<bool> AllowUnusedPrefixes(
-    "allow-unused-prefixes", cl::init(true),
+    "allow-unused-prefixes", cl::init(false),
     cl::desc("Allow prefixes to be specified but not appear in the test."));
 
 static cl::opt<bool> MatchFullLines(
Index: llvm/test/Instrumentation/MemorySanitizer/vector_cvt.ll
===================================================================
--- llvm/test/Instrumentation/MemorySanitizer/vector_cvt.ll
+++ llvm/test/Instrumentation/MemorySanitizer/vector_cvt.ll
@@ -9,6 +9,7 @@
 declare i32 @llvm.x86.sse2.cvtsd2si(<2 x double>) nounwind readnone
 declare <2 x double> @llvm.x86.sse2.cvtsi2sd(<2 x double>, i32) nounwind readnone
 declare x86_mmx @llvm.x86.sse.cvtps2pi(<4 x float>) nounwind readnone
+declare i32 @llvm.x86.avx512.vcvtss2usi32(<4 x float>, i32) nounwind readnone
 
 ; Single argument vector conversion.
 
@@ -45,3 +46,20 @@
 ; CHECK: call x86_mmx @llvm.x86.sse.cvtps2pi
 ; CHECK: store i64 0, {{.*}} @__msan_retval_tls
 ; CHECK: ret x86_mmx
+
+; avx512 rounding conversion.
+
+define i32 @pr48298(<4 x float> %value) sanitize_memory {
+entry:
+  %0 = tail call i32 @llvm.x86.avx512.vcvtss2usi32(<4 x float> %value, i32 11)
+  ret i32 %0
+}
+
+; CHECK-LABEL: @pr48298
+; CHECK: extractelement <4 x i32> {{.*}}, i32 0
+; CHECK: icmp ne i32 {{.*}}, 0
+; CHECK: br
+; CHECK: call void @__msan_warning_with_origin_noreturn
+; CHECK: call i32 @llvm.x86.avx512.vcvtss2usi32
+; CHECK: store i32 0, {{.*}} @__msan_retval_tls
+; CHECK: ret i32
Index: llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
===================================================================
--- llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
+++ llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
@@ -2734,14 +2734,16 @@
   // We copy the shadow of \p CopyOp[NumUsedElements:] to \p
   // Out[NumUsedElements:]. This means that intrinsics without \p CopyOp always
   // return a fully initialized value.
-  void handleVectorConvertIntrinsic(IntrinsicInst &I, int NumUsedElements) {
+  void handleVectorConvertIntrinsic(IntrinsicInst &I, int NumUsedElements,
+                                    bool RoundingMode = false) {
     IRBuilder<> IRB(&I);
     Value *CopyOp, *ConvertOp;
 
-    switch (I.getNumArgOperands()) {
-    case 3:
-      assert(isa<ConstantInt>(I.getArgOperand(2)) && "Invalid rounding mode");
-      LLVM_FALLTHROUGH;
+    assert((!RoundingMode ||
+            isa<ConstantInt>(I.getArgOperand(I.getNumArgOperands() - 1))) &&
+           "Invalid rounding mode");
+
+    switch (I.getNumArgOperands() - RoundingMode) {
     case 2:
       CopyOp = I.getArgOperand(0);
       ConvertOp = I.getArgOperand(1);
@@ -3294,6 +3296,8 @@
     case Intrinsic::x86_avx512_cvtusi2ss:
     case Intrinsic::x86_avx512_cvtusi642sd:
     case Intrinsic::x86_avx512_cvtusi642ss:
+      handleVectorConvertIntrinsic(I, 1, true);
+      break;
     case Intrinsic::x86_sse2_cvtsd2si64:
     case Intrinsic::x86_sse2_cvtsd2si:
     case Intrinsic::x86_sse2_cvtsd2ss:


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