[PATCH] D83059: [RISCV] Use Generated Instruction Uncompresser
Jessica Clarke via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Nov 26 08:42:58 PST 2020
jrtc27 added inline comments.
================
Comment at: llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp:159
+ MCInst UncompressedMI;
+ return uncompressInst(UncompressedMI, Inst, MRI, STI);
}
----------------
Only if Inst is a non-indirect branch (which is exactly the set that `getRelaxedOpcode` previously handled)?
================
Comment at: llvm/test/MC/RISCV/rv64-relax-all.s:7-9
+# INSTR: c.nop
+# RELAX-INSTR: addi zero, zero, 0
+c.nop
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This seems like a regression?
================
Comment at: llvm/test/MC/RISCV/rv64-relax-all.s:17-21
+NEAR2:
+
+# INSTR: c.j 0 <NEAR2>
+# RELAX-INSTR: jal zero, 0 <NEAR2>
+c.j NEAR2
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Why not test with a non-zero immediate like before?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D83059/new/
https://reviews.llvm.org/D83059
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