[PATCH] D86476: [AIX] Add support for non var_arg extended vector ABI calling convention on AIX

[Sean Fertile via Phabricator via llvm-commits]

sfertile added a comment.

Sorry Zarko, I must have deleted my comment before posting last night I've added it back now.



================
Comment at: llvm/test/CodeGen/PowerPC/aix-cc-ext-vec-abi.ll:52
+; ASM32-DAG:     stwu 1, -64(1)
+; ASM32-DAG:     lwz {{[0-9]}}, L..C0(2)
+; ASM32-DAG:     lxvw4x 34, 0, {{[0-9]}}
----------------
I think we should use a variable here to make sure the register used in the toc entry access is the same as used in the vector load:

```
lwz [[SCRATCH1:[0-9]+]], L..C0(2)
lxvw4x 1, 0, [[SCRATCH1]]
```


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D86476/new/

https://reviews.llvm.org/D86476