[PATCH] D92112: [Hexagon] Add support for ISD::SMAX/SMIN/UMAX/UMIN instead of custom dag patterns
Simon Pilgrim via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Nov 25 09:50:12 PST 2020
RKSimon created this revision.
RKSimon added a reviewer: kparzysz.
Herald added subscribers: steven.zhang, hiraditya.
Herald added a project: LLVM.
RKSimon requested review of this revision.
This should handle the basic integer min/max handling, I may have missed something wrt Hexagon type legalization semantics (for instance it sets add/sub etc to be legal for v4i8/v2i16 types but I couldn't get it to work for min/max).
I haven't been able to get the HVX equivalents to work either - any tips would appreciated.
This is some necessary cleanup work for min/max ops to eventually help us move the add/sub sat patterns into DAGCombine - D91876 <https://reviews.llvm.org/D91876>.
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