[PATCH] D92096: [SelectionDAGBuilder] Update signature of `getRegsAndSizes()`.

[Francesco Petrogalli via Phabricator via llvm-commits]

fpetrogalli created this revision.
fpetrogalli added reviewers: peterwaller-arm, joechrisellis.
Herald added subscribers: llvm-commits, hiraditya.
Herald added a project: LLVM.
fpetrogalli requested review of this revision.

The mapping between registers and relative size has been updated to
use TypeSize to account for the size of scalable EVTs.

The patch is a NFCI, if not for the fact that with this change the
function `getUnderlyingArgRegs` does not raise a warning for implicit
conversion of `TypeSize` to `unsigned` when generating machine code
from the test added to the patch.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D92096

Files:
  llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
  llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
  llvm/test/CodeGen/AArch64/reproducer.ll

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