[PATCH] D92068: [MachineCombiner] Add MustReduceRegisterPressure goal
ChenZheng via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Nov 24 19:40:09 PST 2020
shchenz created this revision.
shchenz added reviewers: spatel, eli.friedman, jsji, qcolombet, fhahn, steven.zhang.
Herald added subscribers: llvm-commits, nikic, pengfei, kbarton, hiraditya, nemanjai.
Herald added a project: LLVM.
shchenz requested review of this revision.
add a new goal MustReduceRegisterPressure for machine combiner pass.
This patch should be NFC except for pass pipeline changes. But after I add `LiveIntervals` analysis to this pass, it impacts several cases related to kill/dead flag. I have updated them accordingly.
The strange change is the case `CodeGen/X86/coalescer-dce.ll`, it meets a verify error.
*** Bad machine code: Virtual register defs don't dominate all uses. ***
- function: f1
- v. register: %3
I think there must be some X86 specific bug, since I am not familiar with X86 target, I currently mark it as XFAIL. I will continue to investigate the reason.
PowerPC will use this new goal to do some register pressure related optimization. I will post that patch later.
rG LLVM Github Monorepo
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