[PATCH] D91527: [PowerPC][FP128] Fix the incorrect calling convention for IEEE long double on Power8
Nemanja Ivanovic via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Nov 24 03:38:11 PST 2020
nemanjai accepted this revision.
nemanjai added a comment.
This revision is now accepted and ready to land.
LGTM.
================
Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1169
setOperationAction(ISD::BSWAP, MVT::v1i128, Legal);
+ } else if (Subtarget.hasAltivec() && EnableP8FP128) {
+ addRegisterClass(MVT::f128, &PPC::VRRCRegClass);
----------------
steven.zhang wrote:
> qiucf wrote:
> > can we common some code in previous `if` and this `else`? I see some ops are also marked `Expand` under `P9`.
> I will common the code when removing the EnableP8FP128 options. So that, it is easier to do the code review. It is ok ?
Yes, I'd rather keep the code guarded by this temporary option completely separate. There is some code duplication, but it clearly separates this code to make it obvious what we do for this case.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D91527/new/
https://reviews.llvm.org/D91527
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